1. Field of the Invention
The present invention relates to a device for detecting a timing synchronization, and in particular to an improved device for detecting a timing synchronization which can precisely detect the timing synchronization in a simple structure, a method thereof, and a communication device using the same. The present application is based on Korean Patent Application No. 2001-6517, which is incorporated herein by reference.
2. Description of the Related Art
In general, in a digital communication device such as a digital modem, it is very important to synchronize digital data, namely a symbol in an exact timing. Accordingly, there have been suggested a variety of devices for detecting a timing synchronization.
FIG. 1 is a block diagram illustrating a conventional device for detecting a timing synchronization. As shown in FIG. 1, the device for detecting the timing synchronization includes a first power detector 101, a first semi-symbol delay unit 102, a second semi-symbol delay unit 103, a second power detector 104 and a subtracter 105.
The first power detector 101 receives a real number signal and an imaginary number signal of an input complex signal S(t), and detects a power level. The second power detector 104 receives a sample value delayed more than the input signal of the first power detector 104 by a semi-symbol period from the first semi-symbol delay unit 102 and the second semi-symbol delay unit 103, and detects a power level.
The subtracter 105 outputs a value obtained by subtracting the semi-symbol preceding power level from the second power detector 104 from the power level from the first power detector 101. Here, the output Yk from the subtracter 105 is represented by following formula 1:
<Formula 1>Yk=(XkXk*−Xk−1/2Xk−1/2*)
Here, Xk represents an input signal and Xk−1/2 represents a semi-symbol period delayed signal.
The conventional device for detecting the timing synchronization outputs a greatest value at the precise sample point. Accordingly, whether the timing synchronization is performed can be discriminated according to an output level of the device for detecting the timing synchronization.
On the other hand, in order to restrict a data reception error, it is required to detect a symbol to be synchronized with a signal from a transmission side. For this, a communication device uses a timing error detector for detecting an error of a sampling timing of an input signal, and generating a signal proportional to the error, and a timing restoring circuit for restoring a timing according to the detected timing.
However, the conventional digital communication device respectively employs the device for detecting the timing synchronization and the device,for detecting the timing error, and thus has a complicated structure.
Accordingly, researches have been made to embody the device for detecting the timing synchronization by using the constitutional units of the device for detecting the timing error.